1. Field of the Invention
This invention relates to a control unit for a processor which can be controlled by microprograms, in a data processing system, having a microprogram memory in which recording can be made, exhibiting an access time which is longer than the machine cycle, having an address register which is connected to the selector inputs of the memory, having a microcommand register which is connected to the information outputs of the microprogram memory, having a decoder unit which is connected to the register and by means of which control signals for a processing unit of the processor can be derived from a microcommand in the microcommand register, and having a switching network which is arranged between the microcommand register and the address register and which serves to form the address of the following microcommand, and the present invention further relates to a process for the operation of such a control unit.
2. Description of the Prior Art
Because of a series of advantages, microprogramming has met with a growing interest as a control principle for digital calculating units. The control signals for the microprogram-controlled processor are obtained from bit patterns which are combined in microcommand words and which are stored in read-only memories or writable control memories.
As explained by Husson in his book "Microprogramming: Principles and Practices", Prentice Hall 1970, at Chpt. 2.8, this microprogram memory forms an essential component of a microprogram control unit as it generally governs the expense of a microprogram control unit. Because of the number of microcommand words and the bits in the individual microcommand words, the microprogram memory is two-dimensional. The requisite number of microcommand words is dependent upon the size and the complexity of the selected machine commands, upon their format, upon the addressing mechanism, and upon the efficiency of the interrupt handling of the data processing system.
The length of each microcommand word is determined from the extent of the parallel operation possible within the system. The greater the number of parallel data channels, the more different control columns ae required to control the latter. The more complex the data channels are themselves, the greater is the number of control lines, and, in turn, the more extensive are the associated control columns. On the other hand, a more extensive microcommand word enables a larger number of functions to be handled in one machine cycle, thus reducing the number of microcommand words.
This, in itself, gives rise to an entire series of limiting conditions to one who is skilled in the art, which conditions must be taken into consideration in the design of microprogrammable processors and which considerations are governed not only by costs. To be taken into account are not only differing microcommand structures for the direct or coded control of the processor, but also the time conditions governing the control sequence in the processor, in conjunction with the particular technology which is to be selected. These time conditions are based on the storage access time for a selected storage medium, which is dependent upon the particular technique, and the typical transit times of the circuitry techniques employed for the requisite switching networks and register sets. To achieve an efficient control, an investigation must consequently be carried out into the mutual relationship between the times required for the machine cycle, the microprogram memory cycle, the microcommand decoding and the determination of the address of the following microcommand. These relationships must then be taken into account in the selection of the microcommand format.
The overall time outlay for the processing of a microcommand is composed of the following four entities in the case of sequential processing:
Access to the microprogram memory and read-out of the addressed microcommand into a microcommand register; PA1 Decoding of the contents of the microcommand register; PA1 Logic linking of the register contents addressed by the microcommand in a processing unit, i.e. the actual machine cycle; and PA1 Formation of the address of the next microcommand.
If these individual processes run without any overlapping, after each machine cycle, the processing unit must wait until the mext microcommand has been read-out and decoded. In this extreme situation, the microcommand format should be designed to be such that a microcommand can control either one machine cycle which is long in relation to the access time or else more than one machine cycle. In practice, however, it is attempted to overlap the aforementioned processes as far as possible. This is, however, subject to limits, as microprograms must also allow data-dependent branchings which, however, impede the formation of the following address.
It is not necessary to enter into further details for it is to be clear that the time conditions of the microprogram memory influence the microcommand format. The aforementioned limitations draw the following general conclusion in this respect. If the memory cycle is longer than a possible machine cycle, the microcommand format must be extended. Then, it is either possible to process an additional quantity in one machine cycle in the processing unit, with an additional circuitry outlay, thus extending the machine cycle, or a microcommand can control more than one machine cycle. If, on the other hand, the memory cycle is considerably shorter than a given machine cycle, the format of the microcommand words should be reduced in order to shorten the machine cycle.
Generally speaking, it follows that the size of the microcommand word, and thus the extent of the processing in machine cycle, should be matched to the technology, i.e. to the speed of the microcommand memory, in such a manner that the microprogram memory and the processing unit can operate with approximately equal cycles and suitable overlap, without it being necessary for one of the two units to wait for the other.
In a practical example, this general principle results in a compromise of matching the structure of a microprogram-control processor to the time conditions of the storage medium being employed as a microprogram memory. It is doubtless, however, that one thereby loses the advantages of more efficient processors in consideration of "slower" technologies of the storage medium. In this case, the memory and the processor are coordinated with one another in such a way that there would appear to be little point in using the processor, even with higher speed storage medium which may be developed in the future.